Senior Mixed-Signal Verification Engineer – Power Management ICs
TYLsemi
Bangalore, Karnataka, IndiaPosted 28 days ago
T
Skill Required
Engineering JobsVerilogFulltime
Role overview
This role involves developing and executing mixed-signal verification plans for high-current Integrated Voltage Regulator (IVR) designs. The position focuses on building and maintaining analog behavioral models, performing analog-digital co-simulation, and verifying digital control loops to ensure key performance metrics such as transient response are met.
Responsibilities
- Develop and execute mixed-signal verification plans for high-current IVR designs
- Build and maintain analog behavioral models (Verilog-A / SystemVerilog real-number modeling) for power stages, integrated inductors, PDN, and analog blocks
- Perform analog-digital co-simulation using industry-standard tools (Cadence Xcelium, Spectre, Synopsys VCS, FineSim / CustomSim, or AMS Designer)
- Verify digital control loops
- Create testbenches for key performance metrics: transient response (l...)
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