Posted today · be early
ASIC Verification Engineer
NVIDIA
HyderabadPosted 1 day ago
Skill Required
C++PythonCVerilogSystem ArchitectureSystem VerilogFulltimeAgileFirewall
Key highlights
- 0-2 years of experience required
- BS or MS in Computer Science or Electronics Engineering (or equivalent)
Role overview
We are looking for a Hardware and Software Developer for a multifaceted role involving SoCV testbench Infrastructure, Bare-metal boot, Silicon Bringup Tools, and CPU/SOC/GPU test frameworks. The position requires a detailed understanding of NVIDIA's CPU, GPU, and SOC system and boot architectures, with a focus on complex tools and technologies that coordinate many IPs in the overall SOC. The ideal candidate is a creative and hardworking engineer passionate about joining a dynamic & agile SoCV/Emulation Infrastructure and test-frameworks team, contributing to NVIDIA's rapid delivery of new technology.
Responsibilities
- Building tools, infrastructure, and test frameworks used in RTL-simulations, c-simulations, Emulation, FPGA, and on Silicon
- Understanding Tegra system architecture, with a focus on all IPs in the SOC involved in boot and security features
- Developing tools that enable Design and Verification teams to access registers, memory, DMA engines, and other features in their unit
- Creating features used for Silicon bring up (e.g., FUSE, ATE, Security, Flash/DMA, Board I2Cs, USB debug devices)
- Assessing and building C-model or RTL-simulation capability to simulate features before Silicon arrival in a pre-silicon environment
Requirements
- BS or MS in Computer Science or Electronics Engineering or equivalent experience with 0-2 years of experience
- Strong programming skills in C, C++, and Python
- Understanding of SOC and System Architecture
- Knowledge of how SOC devices like DMA, interrupt-engines, CPU, boot-devices, and MMU/IOMMU function
- Operating System and Device-Driver concepts and ability to write no-OS test frameworks
Nice to have
- Previous experience handling Silicon Bringup and enabling Emulation/FPGA related test frameworks
- Exposure to Testbench architectures (C++ testbenches, SV/UVM based testbenches)
- Verilog and System Verilog coding skills are a plus
